| Criticality Level | ISO 26262 | Description | Example on HPC |
|---|---|---|---|
| ASIL-D | Highest | Failure probability < 10^-8/h | EPS torque control, airbag |
| ASIL-B/C | Medium | Failure probability < 10^-6/h | Lane keeping assist, brake warning |
| ASIL-A | Low | Failure probability < 10^-4/h | Seat belt reminder |
| QM (Quality Management) | None required | No safety requirement | Infotainment, navigation |
Mixed-Criticality Concepts
Freedom from Interference
Interference Prevention Architecture
Goal: QM software cannot corrupt ASIL-D software Memory interference: ASIL-D RAM region: MPU/MMU protected, QM cannot write ASIL-D code flash: read-only to QM partition Timing interference: ASIL-D tasks: dedicated CPU cores (CPU affinity pinning) Cache partitioning: Intel CAT / ARM MPAM to separate L3 cache Memory bandwidth: DRAM QoS to prevent QM starving ASIL-D Communication interference: ASIL-D reads signals directly from CAN/Ethernet (not via QM) QM can send requests to ASIL-D via well-defined IPC with budget ISO 26262 Part 6 Cl.7.4.14: "Software components of different ASIL shall be protected against interference from each other"
Mixed-Criticality Scheduling Configuration
YAMLmcs_scheduling.yaml
# Mixed-criticality scheduling on 8-core ARM Cortex-A78 cluster
cpu_allocation:
# Cores 0-1: dedicated to ASIL-D tasks (isolated from QM)
asil_d_cores: [0, 1]
asil_d_tasks:
- name: VehicleSpeedMonitor
period_ms: 5
wcet_ms: 1.2
priority: 90 # RT priority
- name: BrakeAssistMonitor
period_ms: 10
wcet_ms: 2.1
priority: 85
# Cores 2-7: ASIL-B + QM tasks (shared, scheduled by Linux CFS)
shared_cores: [2, 3, 4, 5, 6, 7]
asil_b_tasks:
- name: LaneDetection
period_ms: 33 # 30 Hz camera
wcet_ms: 15
priority: 70
qm_tasks:
- name: NavigationService
type: best_effort
priority: 20
- name: MediaPlayback
type: best_effort
priority: 10
# Cache partitioning (ARM MPAM)
cache_partitioning:
asil_d_partition: 25% # 2 MB of 8 MB L3 reserved
asil_b_partition: 50%
qm_partition: 25%Summary
Mixed-criticality systems are the central software engineering challenge in SDV HPC design. The ISO 26262 requirement for freedom from interference is not satisfied by software techniques alone (OS scheduler priorities, mutex locks) -- it requires hardware enforcement: dedicated CPU cores for ASIL-D tasks, MMU/MPU-enforced memory isolation, and DRAM QoS configuration. The emerging ARM MPAM (Memory Partitioning and Monitoring) technology enables cache partition allocation at hardware level, preventing the "cache side-channel" problem where a QM task with high cache activity evicts ASIL-D code from the L3 cache, causing the safety-critical task to miss its deadline. This level of hardware/software co-design is what separates production-safe SDV architecture from academic mixed-criticality research.
🔬 Deep Dive — Core Concepts Expanded
This section builds on the foundational concepts covered above with additional technical depth, edge cases, and configuration nuances that separate competent engineers from experts. When working on production ECU projects, the details covered here are the ones most commonly responsible for integration delays and late-phase defects.
Key principles to reinforce:
- Configuration over coding: In AUTOSAR and automotive middleware environments, correctness is largely determined by ARXML configuration, not application code. A correctly implemented algorithm can produce wrong results due to a single misconfigured parameter.
- Traceability as a first-class concern: Every configuration decision should be traceable to a requirement, safety goal, or architecture decision. Undocumented configuration choices are a common source of regression defects when ECUs are updated.
- Cross-module dependencies: In tightly integrated automotive software stacks, changing one module's configuration often requires corresponding updates in dependent modules. Always perform a dependency impact analysis before submitting configuration changes.
🏭 How This Topic Appears in Production Projects
- Project integration phase: The concepts covered in this lesson are most commonly encountered during ECU integration testing — when multiple software components from different teams are combined for the first time. Issues that were invisible in unit tests frequently surface at this stage.
- Supplier/OEM interface: This is a topic that frequently appears in technical discussions between Tier-1 ECU suppliers and OEM system integrators. Engineers who can speak fluently about these details earn credibility and are often brought into critical design review meetings.
- Automotive tool ecosystem: Vector CANoe/CANalyzer, dSPACE tools, and ETAS INCA are the standard tools used to validate and measure the correct behaviour of the systems described in this lesson. Familiarity with these tools alongside the conceptual knowledge dramatically accelerates debugging in real projects.
⚠️ Common Mistakes and How to Avoid Them
- Assuming default configuration is correct: Automotive software tools ship with default configurations that are designed to compile and link, not to meet project-specific requirements. Every configuration parameter needs to be consciously set. 'It compiled' is not the same as 'it is correctly configured'.
- Skipping documentation of configuration rationale: In a 3-year ECU project with team turnover, undocumented configuration choices become tribal knowledge that disappears when engineers leave. Document why a parameter is set to a specific value, not just what it is set to.
- Testing only the happy path: Automotive ECUs must behave correctly under fault conditions, voltage variations, and communication errors. Always test the error handling paths as rigorously as the nominal operation. Many production escapes originate in untested error branches.
- Version mismatches between teams: In a multi-team project, the BSW team, SWC team, and system integration team may use different versions of the same ARXML file. Version management of all ARXML files in a shared repository is mandatory, not optional.
📊 Industry Note
Engineers who master both the theoretical concepts and the practical toolchain skills covered in this course are among the most sought-after professionals in the automotive software industry. The combination of AUTOSAR standards knowledge, safety engineering understanding, and hands-on configuration experience commands premium salaries at OEMs and Tier-1 suppliers globally.