Wear Leveling & Endurance

/* EEPROM emulation: two sectors; record appending; page transfer when full */
/* Based on STM32 AN2594 / Aurix EEPROM emulation pattern */

#define PAGE0  0x80060000u
#define PAGE1  0x80064000u
#define PGSZ   (16u * 1024u)

typedef struct { uint16_t status; uint16_t vaddr; uint32_t data; } NvRec_t;

uint32_t NvM_Read(uint16_t vaddr)
{
    uint32_t base = Nvm_GetActivePage();
    int32_t off   = (int32_t)PGSZ - (int32_t)sizeof(NvRec_t);
    while (off >= (int32_t)sizeof(uint16_t)) {
        NvRec_t r; memcpy(&r, (void *)(base + off), sizeof(r));
        if (r.status == 0u && r.vaddr == vaddr) return r.data;
        off -= (int32_t)sizeof(NvRec_t);
    }
    return 0xFFFFFFFFu;
}

Std_ReturnType NvM_Write(uint16_t vaddr, uint32_t data)
{
    uint32_t base = Nvm_GetActivePage();
    for (uint32_t off = sizeof(uint16_t); off <= PGSZ - sizeof(NvRec_t);
         off += sizeof(NvRec_t)) {
        if (*(uint32_t *)(base + off) == 0xFFFFFFFFu) {
            NvRec_t r = {0u, vaddr, data};
            return Flash_WriteAndVerify(base + off, (uint8_t *)&r, sizeof(r));
        }
    }
    return Nvm_PageTransfer(vaddr, data);  /* page full: copy to other page */
}
/* Two sectors → each virtual address gets 2x write budget = 200k writes */

/* Track erase counts per sector; report via DID for OEM analytics */
#define NVM_ADDR_ERASE_BASE  0x0100u
#define MAX_SAFE_CYCLES      80000u   /* 80% of 100k */

void Flash_IncrementEraseCount(uint32_t sector_idx)
{
    uint16_t vaddr = (uint16_t)(NVM_ADDR_ERASE_BASE + sector_idx);
    uint32_t cnt   = NvM_Read(vaddr);
    if (cnt == 0xFFFFFFFFu) cnt = 0u;
    NvM_Write(vaddr, ++cnt);
    if (cnt >= MAX_SAFE_CYCLES)
        Dem_ReportErrorStatus(DEM_EVENT_FLASH_WEAR_WARNING, DEM_EVENT_STATUS_FAILED);
}