Timer/Counter Programming

/* ARM SysTick: 24-bit down-counter, RTOS tick source */
/* Aurix STM: 64-bit free-running (covered in GPIO lab) */
/* Aurix GTM (Generic Timer Module): full-featured for PWM/capture */

/* STM32-style TIM: General Purpose Timer — demonstrates ARM timer patterns */
typedef struct {
    volatile uint16_t CR1;    /* Control Register 1 */
    volatile uint16_t CR2;    /* Control Register 2 */
    volatile uint16_t SMCR;   /* Slave Mode Control */
    volatile uint16_t DIER;   /* DMA/Interrupt Enable */
    volatile uint16_t SR;     /* Status Register */
    volatile uint16_t EGR;    /* Event Generation */
    volatile uint16_t CCMR1;  /* Capture/Compare Mode 1 */
    volatile uint16_t CCMR2;  /* Capture/Compare Mode 2 */
    volatile uint16_t CCER;   /* Capture/Compare Enable */
    volatile uint16_t CNT;    /* Counter */
    volatile uint16_t PSC;    /* Prescaler */
    volatile uint16_t ARR;    /* Auto-Reload Register (period) */
    volatile uint16_t reserved;
    volatile uint16_t CCR1;   /* Capture/Compare Register 1 */
    volatile uint16_t CCR2;   /* Capture/Compare Register 2 */
} Tim_Regs_t;

#define TIM2  ((Tim_Regs_t *)0x40000000u)

/* Timer period: f_timer = f_APB / (PSC+1);  period = (ARR+1) / f_timer
   Example: 72 MHz APB, 1 kHz tick:
   PSC = 71 (divide by 72 → 1 MHz timer clock)
   ARR = 999 (count 0→999, reload → 1 ms period) */

#include 

/* Timer-based PWM: 1 kHz, 25% duty cycle on TIM2 CH1 */
/* TIM2 runs at 1 MHz (PSC=71 for 72 MHz APB1) */
/* ARR=999 → 1 kHz PWM frequency */
/* CCR1=250 → 25% duty (compare match at count=250) */

void Tim2_PwmInit(uint16_t duty_1000)  /* duty_1000: 0–1000 = 0–100% */
{
    /* 1. Enable TIM2 clock in RCC */
    RCC_APB1ENR |= (1u << 0u);   /* TIM2 clock enable */

    /* 2. Configure timer: PSC, ARR */
    TIM2->PSC = 71u;              /* 72 MHz / 72 = 1 MHz timer clock */
    TIM2->ARR = 999u;             /* period: 1000 ticks = 1 ms = 1 kHz */

    /* 3. Configure CH1 as PWM mode 1 (high while CNT < CCR1) */
    TIM2->CCMR1 = (0x06u << 4u); /* OC1M = 0b110: PWM mode 1 */
    TIM2->CCMR1 |= (1u << 3u);   /* OC1PE: preload enable */

    /* 4. Set duty cycle */
    TIM2->CCR1 = (uint16_t)((duty_1000 * (TIM2->ARR + 1u)) / 1000u);

    /* 5. Enable CH1 output and counter */
    TIM2->CCER  |= (1u << 0u);   /* CC1E: capture/compare 1 enable */
    TIM2->CR1   |= (1u << 0u);   /* CEN: counter enable */
}

void Tim2_SetDuty(uint16_t duty_1000) {
    TIM2->CCR1 = (uint16_t)((duty_1000 * (TIM2->ARR + 1u)) / 1000u);
    /* CCR1 write is buffered via preload until next update event (ARR reload) */
}

#include 

/* Input capture: measure period of an external signal (e.g., wheel speed sensor) */
/* Each rising edge triggers capture → store CNT value in CCR */

static volatile uint16_t g_last_capture = 0u;
static volatile uint16_t g_period_ticks = 0u;

/* TIM3 CH1 input capture ISR */
void TIM3_IRQHandler(void)
{
    if (TIM3->SR & (1u << 1u)) {   /* CC1IF: capture event on CH1 */
        uint16_t current = TIM3->CCR1;  /* reading CCR clears CC1IF */
        g_period_ticks = current - g_last_capture;  /* period in timer ticks */
        g_last_capture = current;
        /* 16-bit subtraction handles wrap-around correctly */
    }
}

/* Convert timer ticks to RPM */
/* Timer: 1 MHz clock; 1 pulse per tooth; 60 teeth on wheel */
#define TIMER_FREQ_HZ     1000000u
#define TEETH_PER_REV     60u

float get_wheel_rpm(void)
{
    uint16_t ticks;
    Critical_t s = Critical_Enter();
    ticks = g_period_ticks;
    Critical_Exit(s);
    if (ticks == 0u) return 0.0f;
    float freq_hz = (float)TIMER_FREQ_HZ / (float)ticks;
    return freq_hz * 60.0f / (float)TEETH_PER_REV;
}