| Bit | Name | Set Condition | Clear Condition |
|---|---|---|---|
| 0 | testFailed | Monitor reports FAILED | Monitor reports PASSED; or ClearDTC ($14) |
| 1 | testFailedThisOpCycle | Bit 0 set at any point in current op cycle | Operation cycle restart |
| 2 | pendingDTC | testFailed set in this or previous op cycle | Not testFailed in two consecutive op cycles |
| 3 | confirmedDTC | DemConfirmationThreshold FAILED counts reached | ClearDTC ($14) |
| 5 | testFailedSinceLastClear | testFailed set since last ClearDTC | ClearDTC ($14) |
| 7 | warningIndicatorRequested | DTC confirmed AND DemEventClass WIR = TRUE | No confirmed DTC with WIR; or ClearDTC |
DTC Status Byte (UDS ISO 14229-1)
DEM Event Configuration
XMLDem_Cfg.arxml
<DEM-EVENT-CLASS>
<SHORT-NAME>SensorTemperature_HighFault</SHORT-NAME>
<DEM-AGING-ALLOWED>TRUE</DEM-AGING-ALLOWED>
<DEM-AGING-COUNTER-THRESHOLD>40</DEM-AGING-COUNTER-THRESHOLD>
<DEM-CONFIRMATION-THRESHOLD>1</DEM-CONFIRMATION-THRESHOLD>
<DEM-DTC-REF>/Dem/DTCs/C00010</DEM-DTC-REF>
<DEM-OPERATION-CYCLE-REF>/Dem/OpCycles/IgnitionCycle</DEM-OPERATION-CYCLE-REF>
<DEM-ENABLE-CONDITION-GROUP-REF>
/Dem/EnableConditions/ECU_Ready
</DEM-ENABLE-CONDITION-GROUP-REF>
</DEM-EVENT-CLASS>Primary vs User-Defined Memory
| Memory | Purpose | Config Key |
|---|---|---|
| Primary Memory | OBD-mandated DTC storage; accessible via UDS $19 | DemMemoryDestinationRef → PrimaryMemory |
| Mirror Memory | Copy of primary for rapid DCM read access | DemMemoryDestinationRef → MirrorMemory |
| User-Defined Memory | Additional DTC groups (manufacturer-specific) | DemMemoryDestinationRef → UserDefinedMemory |
DEM–DCM Interaction for $19 02
CDem_ReadDTC.c
Dem_SetDTCFilter(0xFF,
DEM_DTC_KIND_ALL_DTCS,
DEM_DTC_FORMAT_UDS,
DEM_DTC_ORIGIN_PRIMARY_MEMORY,
DEM_FILTER_WITH_SEVERITY_NO, 0,
DEM_FILTER_FOR_FDC_NO);
uint32 DTC; Dem_EventStatusExtendedType DTCStatus;
while (Dem_GetNextFilteredDTC(&DTC, &DTCStatus) == DEM_FILTERED_OK) {
AppendDTCToResponse(DTC, DTCStatus); /* build $59 02 response */
}Summary
DEM is the persistent health record of the ECU. Correct operation cycle assignment, confirmation threshold, and aging configuration are critical for OBD compliance. Every DTC must be traced from DemEventClass through to the UDS $19 response to verify the status byte set/clear behaviour.
🔬 DTC Status Byte Bit-by-Bit Analysis
The DTC status byte (defined in ISO 14229-1) is an 8-bit register. Each bit has a precise set/clear condition that the DEM module must track correctly for workshop diagnostic tools to work reliably:
- Bit 0 — TestFailed (TF): Set when DEM_EVENT_STATUS_FAILED is reported. Cleared when DEM_EVENT_STATUS_PASSED or when the operation cycle restarts and no new failure occurs (depending on DemResetConfirmedBitOnOverflow config).
- Bit 1 — TestFailedThisOperationCycle (TFTOC): Set on first failure in current cycle. Cleared at start of next operation cycle. Used to distinguish 'failed now' from 'failed before'.
- Bit 2 — PendingDTC (PDTC): Set when TF becomes 1 for the first time. Cleared after one complete fault-free operation cycle. Scan tools read this to find intermittent faults that haven't yet confirmed.
- Bit 3 — ConfirmedDTC (CDTC): Set when the event has failed the Confirmation Threshold (DemEventConfirmationThreshold cycles). This is the bit that illuminates the MIL. Critical: once set, it is NOT cleared by a passing test — only by a Clear DTC command (0x14) or sufficient fault-free cycles (aging).
- Bit 4 — TestNotCompletedSinceLastClear (TNCLC): Set on DCIclear; cleared when first test result arrives. Enables OBD readiness monitoring.
- Bit 5 — TestFailedSinceLastClear (TFSLC): Set on first failure after clear; never cleared except by another clear command. Provides fault history.
- Bit 6 — TestNotCompletedThisOperationCycle (TNCTOC): Set at cycle start; cleared on first test. Enables cycle-level test monitoring.
- Bit 7 — WarningIndicatorRequested (WIR): Controlled by FiM/DEM IndicatorControl. Does NOT automatically follow CDTC — the DemIndicatorAttribute must be configured to link the two.
🏭 Production DEM Configuration Lessons
- MIL illumination timing: Euro 6 OBD regulations require that the MIL illuminates within 3 drive cycles of a confirmed emissions-relevant fault. The DemEventConfirmationThreshold must be ≤ 3, and DemAgingCycleCounterThreshold must be ≥ 40 for OBD-monitored events.
- Snapshot data sizing: Each snapshot record (freeze frame) stores signal values at fault confirmation time. A typical powertrain ECU stores 10–15 signals per DTC. With 200 DTCs × 15 signals × 2 bytes = 6 KB of NvM snapshot storage. Running out of NvM is a common late-project integration surprise.
- DEM–DEM interaction via DemComponentFailed: BMW's iDrive ECUs use DemComponent hierarchies so that when a power supply fault (Bit 3 set on V_BAT_LOW) is active, all child component events are suppressed — preventing hundreds of false DTCs from flooding the workshop scan tool.
⚠️ DEM Configuration Pitfalls
- Missing DemOperationCycle linkage: If an event is not linked to an OperationCycle, TFTOC and TNCTOC bits will never clear. The DTC appears permanently active in the scan tool even after the fault is resolved.
- Confirmation threshold too high: A threshold of 10 means a real fault must occur in 10 consecutive drive cycles before the MIL lights. OBD regulations prohibit thresholds > 3 for Type A events. This is a common OBD certification failure.
- Aging cycle = confirmation cycle: If DemAgingCycleRef points to the same cycle as DemOperationCycleRef, the DTC may never age out — it re-confirms on every cycle. Use the DemAgingCycleCounterThreshold to enforce a minimum fault-free period.
- Extended data records not allocated: DemExtendedDataRecordClass entries must be linked to DemEventClass AND have a DemDataElementClass with a valid callback. Missing callback = DEM calls a null pointer at runtime.
📊 Industry Note
A common cause of failed OBD certification audits is incorrect DTC status byte behaviour during edge cases: power-down mid-cycle, rapid on/off cycling, and clear-DTC-during-active-fault. Testing all 8 status bit transitions is a mandatory part of the ECU System Test in most Tier-1 V-cycle processes.
🧠 Knowledge Check — Click each question to reveal the answer
❓ What is the difference between PendingDTC (Bit 2) and ConfirmedDTC (Bit 3), and why does a scan tool check both?
✅ PendingDTC sets on first failure in any cycle — it's an 'early warning'. ConfirmedDTC sets only after the event has failed DemEventConfirmationThreshold times consecutively. A scan tool checks PendingDTC to find intermittent/early-stage faults that haven't yet confirmed. This is especially important for intermittent wiring faults that pass before confirmation.
❓ A customer reports their MIL does not extinguish after the fault was repaired. Which DEM configuration or standard behaviour could explain this?
✅ CDTC (Bit 3) is not automatically cleared when the test passes. It is cleared only by: (a) a UDS ClearDiagnosticInformation (0x14) command, or (b) the aging counter reaching DemAgingCycleCounterThreshold fault-free cycles. If aging is misconfigured or the required number of fault-free drive cycles hasn't been completed, the MIL stays on. The technician must use a scan tool to issue a clear command after repair verification.
❓ How does the FiM module interact with DEM, and why is the interaction safety-relevant?
✅ FiM (Function Inhibition Manager) reads DEM event status and controls FID (Function Inhibition ID) permissions. SWC runnables call FiM_GetFunctionPermission() to check if they are allowed to run. Example: if the wheel speed sensor DEM event is active, FiM inhibits the ABS control runnable. This prevents a safety function from operating on faulty sensor data — a key ISO 26262 safety mechanism.