AUTOSAR Classic BSW

Overview

AUTOSAR Classic is the backbone of embedded automotive software, used in over 200 million ECUs worldwide. This comprehensive course takes you from basic layered architecture concepts to production-level BSW configuration and integration.

You'll gain hands-on experience configuring every major BSW module - COM, NvM, DCM, BswM, EcuM, OS - using real AUTOSAR toolchains. Each module includes practical exercises that mirror real OEM development workflows.

Each chapter provides comprehensive written documentation with technical diagrams, code examples, configuration references, and step-by-step implementation guides.

By the end of this course, you'll be able to independently configure and integrate a complete AUTOSAR Classic BSW stack, debug common integration issues, and contribute effectively to any AUTOSAR project at an OEM or Tier-1.

Course Modules

AUTOSAR Architecture & Concepts

6 chapters • 4.5 hrs reading

AUTOSAR Layered Architecture OverviewFREE PREVIEW 45 min read

▸ Three-layer model: Application, RTE, and BSW - roles, boundaries, and dependency rules

▸ BSW cluster structure: MCAL, ECU Abstraction Layer, Services Layer, and Complex Drivers

▸ AUTOSAR ECU architecture vs. non-AUTOSAR: what the layering changes in practice

▸ AUTOSAR release history (R3.x → R4.x) and production impact on BSW module APIs

Software Components & Port InterfacesFREE PREVIEW 40 min read

▸ SWC types: Atomic, Composition, Sensor/Actuator, ECU-Abstraction, and Service SWC

▸ Port types: Required (R-Port) vs. Provided (P-Port); SenderReceiver vs. ClientServer interfaces

▸ Interface variants: SenderReceiver, ClientServer, Mode, Parameter, NvData - when to use each

▸ Internal Behavior: Runnable entities, trigger conditions (TimingEvent, DataReceivedEvent), and IRVs

RTE - Runtime Environment Deep Dive 50 min read

▸ RTE generation: ARXML input → Rte_<SwcName>.h / Rte_<SwcName>.c output structure

▸ API patterns: Rte_Read/Write for SR ports; Rte_Call/Result for CS ports; return value semantics

▸ Data consistency: implicit vs. explicit access modes, copy semantics, and buffer allocation

▸ Runnable-to-task mapping: RteEventToTaskMapping, activation offsets, and RTE scheduler integration

System Description & ECU Configuration 45 min read

▸ ARXML schema layers: SystemDescription, ECUInstance, and SoftwareComposition element hierarchy

▸ Signal mapping chain: SystemSignal → I-PDU → Frame in the system extract workflow

▸ ECU Extract generation: filtering ECU-specific ARXML from full system ARXML in SystemDesk

▸ Configuration flow: System Configurator → ECU Configurator → BSW module config dependency chain

AUTOSAR Methodology & Workflow 35 min read

▸ OEM–Tier-1 ARXML handover artifacts: system description, ECU extract, and SWC descriptions

▸ Three development phases: Architecture Design, BSW Configuration, and SWC Implementation

▸ Toolchain role split: SystemDesk (system), DaVinci Developer (SWC), DaVinci Configurator (BSW)

▸ AUTOSAR CP version mismatch between SWC ARXML and BSW toolchain: symptoms and resolution

Hands-On: First SWC Configuration 55 min read

▸ Creating an Atomic SWC in DaVinci Developer: port definitions, runnable creation, ARXML export

▸ Mapping SWC COM signal to RTE port via System Extract signal routing in SystemDesk

▸ Generating RTE code and verifying Rte_Read / Rte_Write calls appear in the runnable stub

▸ Common pitfalls: missing ComSpec, mismatched data element types, undefined runnable periods

Communication Stack (COM, PduR, CanIf)

6 chapters • 4.8 hrs reading

COM Module - Signal Packing & Routing 50 min read

▸ Signal byte-order encoding: ComSignalEndianness (OPAQUE, BIG_ENDIAN, LITTLE_ENDIAN) rules

▸ I-PDU composition: ComBitPosition, ComBitSize, ComSignalType - exact bit-packing arithmetic

▸ Transmission modes: DIRECT, PERIODIC, MIXED - ComTxMode config and MinimumDelayTime

▸ Rx deadline monitoring: ComRxTimeout, Com_RxIndication callbacks, and DEM event linkage

PDU Router - Routing Tables & Gateways 45 min read

▸ Routing path flow: CanIf_RxIndication → PduR → COM vs. PduR gateway direct forwarding

▸ PduRRoutingTable config: PduRRoutingPath, PduRSrcPduRef, PduRDestPduRef - mandatory parameters

▸ I-PDU gateway modes: signal translation vs. raw PDU forwarding and TransmissionConfirmation timing

▸ Multicast routing: one-source-to-many-destinations and fan-out bus load impact

CAN Interface & Transceiver Driver 40 min read

▸ HOH (Hardware Object Handle) types: BasicCAN vs. FullCAN Rx/Tx objects and CAN Controller refs

▸ CanIf PDU ID mapping: CanIfRxPduId → CanId with STANDARD/EXTENDED/MIXED frame filtering

▸ Transceiver driver integration: TJA1043/TJA1050 wakeup, CanIf_SetTrcvMode, and bus-off handling

▸ CanSM state machine: BUS_OFF, FULL_COM, NO_COM state transitions and recovery timers

LIN & FlexRay Communication Stacks 45 min read

▸ LIN schedule table types: unconditional, sporadic, and event-triggered frames in LIN Master config

▸ LinIf/LinTp configuration: LIN cluster parameters, channel mapping, and PDU routing for slave ECUs

▸ FlexRay cluster parameters: cycle length, static slot count, minislot length, and dynamic segment

▸ FrIf PDU triggering modes: AbsolutelyScheduled, TriggeredOnChange, and Pending trigger types

Hands-On: Full COM Stack Configuration 60 min read

▸ End-to-end setup: CanDrv → CanIf HOH → PduR routing → COM signals, validated in CANoe trace

▸ Configuring a 500 kbps CAN channel with 8 Rx and 4 Tx PDUs in DaVinci Configurator Pro

▸ Verifying byte-order packing: bit-level signal trace in CANoe compared against ComBitPosition config

▸ Common issues: missing PduRRoutingPath, HOH count overflow, BusOff not triggering CanSM reset

Signal Gateway & Multi-Bus Routing 45 min read

▸ CAN-to-CAN gateway: raw PDU fan-out via PduR without COM signal processing overhead

▸ CAN-to-LIN gateway: timeout behavior, signal invalidation, and LinIf schedule interaction

▸ PduR FIFO buffering: PduRQueueDepth configuration and buffer overflow error handling

▸ Gateway latency analysis: PduR routing delay budget and cross-bus timing constraints

Diagnostic Stack (DCM, DEM, FIM)

6 chapters • 4.8 hrs reading

DCM - Diagnostic Communication Manager 55 min read

▸ DSL layer: session transitions (0x10), NRC 0x7F response building, and S3Server timer config

▸ DSD layer: service dispatching, sub-function routing, and DcmDsdServiceTable parameter mapping

▸ DSP layer: ReadDataByIdentifier 0x22, WriteDataByIdentifier 0x2E - DcmDspDid configuration

▸ SecurityAccess 0x27: seed/key algorithm plug-in hookup, DcmDspSecurityRow timing parameters

DEM - DTC Storage & Status Byte Logic 50 min read

▸ DTC status byte (UDS format): TestFailed, Confirmed, Pending, WIR bits - exact set/clear conditions

▸ DEM event config: DemEventClass, DemOperationCycle, DemAgingCounterThreshold, and DemEnableCondition

▸ Primary vs. user-defined memory: DemMemoryDestinationRef and snapshot/extended data record setup

▸ DEM–DCM interaction: ReadDTCInformation 0x19 sub-function routing and ClearDiagnosticInformation

FIM - Function Inhibition Manager 35 min read

▸ FID (Function Inhibition ID) concept: linking SWC functions to DEM events for runtime inhibition

▸ FiM_GetFunctionPermission() API: return value semantics and where to call it in runnable code

▸ FimInhibitionConfiguration: LAST_FAILED, TESTED_AND_FAILED, TESTED modes - differences explained

▸ Multiple DEM events per FID: AND/OR inhibition logic and ISO 26262 safety architecture impact

UDS Service Implementation in AUTOSAR 45 min read

▸ DCM service table: DcmDsdServiceTable and port interface for read/write/routine callback routing

▸ RoutineControl 0x31: DcmDspRoutine config, RequestResults polling pattern, and stop timeout

▸ RequestDownload/TransferData (0x34/0x36): DCM transfer session config for programming sequence

▸ Response pending (NRC 0x78): asynchronous operation pattern and ForceResponsePending trigger

Diagnostic Extraction (DEXT) & ODX Mapping 40 min read

▸ DEXT (Diagnostic Extract Template) in AUTOSAR: DcmConfig ARXML → ODX export mapping workflow

▸ DID definitions in ARXML: DiagnosticDataIdentifier, read/write conditions, and data element length

▸ CANdelaStudio import of AUTOSAR DEXT for CDD generation and diagnostic tester integration

▸ Keeping DEXT in sync: AUTOSAR round-trip for DID additions, DTC changes, and version control

Hands-On: Complete Diagnostic Configuration 65 min read

▸ DCM setup: two sessions (Default, Extended), SecurityAccess seed/key, and three DIDs (0x1001–0x1003)

▸ DEM event with snapshot record: defining DTC 0xC00010, operation cycle, and confirmed threshold

▸ FIM: inhibiting an SWC runnable when the DEM event is TESTED_AND_FAILED - config and code

▸ Validation: CANoe diag request trace - 0x22 DID read, 0x19 02 DTC scan, 0x27 security unlock

Memory Stack (NvM, Fee, Fls)

5 chapters • 3.8 hrs reading

NvM Block Configuration & Types 50 min read

▸ NvM block types: NATIVE (no redundancy), REDUNDANT (dual copy), DATASET (indexed) - use-case selection

▸ Block descriptor params: NvMBlockManagementType, NvMNvBlockLength, NvMRamBlockDataAddress

▸ NvM init flow: NvM_Init, ReadAll job, default data callback (NvMInitBlockCallback) and ROM block ref

▸ WriteAll/ReadAll job processing: queuing priority, NvMJobPriority, and NvM_MainFunction cycle time

Fee - Flash EEPROM Emulation 40 min read

▸ Fee sector layout: FeeBlockSize, FeeNumberOfWriteCycles, sector-pair wear-leveling strategy

▸ Fee block header status bytes: VALID, INVALID, INCONSISTENT states and detection logic

▸ Fee_Read / Fee_Write / Fee_EraseImmediateBlock: synchronous vs. asynchronous operation modes

▸ Garbage collection trigger: when it fires, duration impact on ECU sleep timing and BswM interaction

Explicit & Implicit Synchronization 45 min read

▸ NvM_WriteBlock (explicit) vs. NvM_WriteAll (implicit): when each is used and shutdown timing

▸ AUTOSAR NvM CRC types: CRC-8/16/32 block checksum configuration and CRC validation on read

▸ RAM mirror concept: NvMRamBlockDataAddress pointer vs. permanent RAM block allocation trade-offs

▸ Multi-block job scheduling: NvM_CancelJobs, priority queue behaviour, and BswM trigger integration

Error Recovery & Redundant Blocks 35 min read

▸ REDUNDANT block read sequence: primary read failure → secondary fallback and inconsistency handling

▸ NvM_RequestResultType codes: NVM_REQ_OK, NVM_REQ_NV_INVALIDATED, NVM_REQ_INTEGRITY_FAILED

▸ Flash driver ECC fault: FlsJobResultType, Fee re-erase trigger, and data recovery procedure

▸ Emergency erase procedure: full Fee sector invalidation workflow used in production EOL tooling

Hands-On: Persistent Storage Setup 55 min read

▸ Configuring three NvM blocks: 8-byte NATIVE (odometer), 32-byte REDUNDANT, 128-byte DATASET

▸ Fee sector split: mapping two physical flash sectors to Fee and verifying layout with Lauterbach

▸ NvM ReadAll on startup: BswM rule ensuring all blocks load before switching to RUN mode

▸ Common pitfalls: RAM pointer mismatch, CRC not enabled, WriteAll timeout at shutdown

OS, EcuM & BswM

6 chapters • 4.8 hrs reading

AUTOSAR OS - Tasks, Alarms, Counters 50 min read

▸ OSEK/VDX task model: BASIC vs. EXTENDED tasks, activation counts, and preemption rules

▸ Scheduling policies: fixed-priority preemptive (FP) and non-preemptive (NP) - configuration and trade-offs

▸ Counter and alarm config: OsCounterMaxAllowedValue, OsAlarmCounterRef, tick resolution, and cycle

▸ OSEK resources and spinlocks: priority ceiling protocol (PCP) for inter-task data protection

EcuM - Startup & Shutdown Sequences 45 min read

▸ EcuM Flexible state machine: STARTUP, UP, SLEEP, WAKEUP, SHUTDOWN phases and transitions

▸ EcuM callouts: EcuM_AL_DriverInitOne/Two, DriverInitList ordering, and MCU driver sequencing

▸ Wakeup source config: EcuMWakeupSource, validation timeout, and ComM wakeup notification

▸ Shutdown arbitration: EcuM_GoDown vs. EcuM_RequestSleep and BswM voting to delay shutdown

BswM - Mode Management & Rules 55 min read

▸ BswM rule anatomy: BswMRule, BswMLogicalExpression, BswMCondition, BswMActionList structure

▸ Mode request sources: ComM mode indication, DcmCommunicationControl, EcuM wakeup, SWC mode switch

▸ Action list types: TRIGGER_ON_REQUEST vs. IMMEDIATE evaluation and action list abort behaviour

▸ BswM use cases: PDU group switching, COM channel enable/disable, NvM WriteAll trigger at shutdown

SchM - Schedule Manager for BSW 35 min read

▸ SchM_Enter/SchM_Exit exclusive area: generated code for BSW data consistency - how it maps to OS calls

▸ Exclusive area naming convention: SchM_Enter_<Module>_<ExclusiveArea> and conflict prevention

▸ BSW main function scheduling: Com_MainFunctionRx/Tx, Dem_MainFunction → OS task and period mapping

▸ Multi-core SchM: cross-core exclusive areas, spinlock assignment, and AUTOSAR OS spinlock API

Wakeup & Sleep Mode Handling 40 min read

▸ CAN wakeup path: CanIf_CheckWakeup() → EcuM wakeup source notification → EcuM validation timer

▸ CanSM network transitions: SILENT_COMMUNICATION → FULL_COM → NO_COM based on ComM state

▸ Low-power entry sequence: BswM voting, COM PduGroup disable, CanIf → SLEEP state transition

▸ Partial networking (PN): CanNm selective wakeup, PN filter mask config, and wakeup frame handling

Hands-On: Complete Mode Management 60 min read

▸ BswM SLEEP rule: ComM NO_COM AND NvM WriteAll complete → EcuM_GoSleep action list config

▸ CAN wakeup path test: CanIf wakeup event → EcuM validation → BswM FULL_COM mode switch

▸ EcuM DriverInitList: verifying module init order and timing via TRACE32 breakpoints

▸ Common issues: BswM rule never fires (condition never true), mode deadlock, missing EcuM callout

Toolchain & Integration

5 chapters • 4.8 hrs reading

ISOLAR / DaVinci Configurator Walkthrough 60 min read

▸ ISOLAR-AB vs. ISOLAR-EVE: System Design tool vs. ECU Configuration tool - roles and artifact exchange

▸ DaVinci Configurator Pro workspace: project structure, ECU extract import, and BSW module variants

▸ Module configuration workflow: load plugin → set mandatory parameters → validate → generate code

▸ Variant management: multiple hardware targets in one DaVinci project using configuration variants

EB tresos Configuration Deep Dive 55 min read

▸ tresos Studio project layout: Autosar.xdm root file, per-module .xdm files, and .epx extension files - what each contains

▸ Plugin system internals: BSWMD files define the configuration meta-model; tresos validates multiplicity, references, and constraints against them

▸ Configuration editor: Container → Parameter hierarchy, navigating cross-references (e.g., ComIPduRef → PduRSrcPdu), and error marker resolution

▸ Generated output anatomy: GENDATA/Xxx_Cfg.h (pre-compile), Xxx_PBcfg.c (post-build), Xxx_Lcfg.c (link-time) - when each is regenerated and why

Code Generation & Compilation 45 min read

▸ Generated file classification: pre-compile (Xxx_Cfg.h) vs. link-time (Xxx_Lcfg.c) vs. post-build (Xxx_PBcfg.c) - rules for when each can be changed without full rebuild

▸ Makefile / CMake integration: include paths for GENDATA, AUTOSAR_TYPES, SWC stub directories - resolving "Xxx_Types.h not found" linker errors

▸ MISRA-C:2012 in generated code: understanding tool-injected suppression comments, QAC/Polyspace deviation records, and what must not be manually edited

▸ Stale code detection: comparing .arxml checksum against generated header guard macros - CI pipeline check to catch uncommitted config changes

Multi-Core AUTOSAR Configuration 50 min read

▸ OsCore task/ISR assignment: mapping Tasks and Resources to OsCore0/OsCore1, spinlock-protected vs. core-local shared data rules

▸ RTE multi-core mapping: OsApplication assignment for each SWC, inter-core port communication via IOC (Inter-OS-Application Communicator) buffers

▸ BSW module core affinity: singleton modules (NvM, DEM run on Core 0) vs. per-core modules (CanIf per network cluster), and the impact on init sequencing

▸ Memory protection setup: OsApplication trusted/non-trusted boundaries, MPU region config for per-core stack, .data sections, and MCAL I/O register access

Hands-On: Full ECU Integration Project 75 min read

▸ Full BSW stack assembly: EcuM DriverInitListZero through FULL_RUN - verifying module init order with TRACE32 breakpoints on each Xxx_Init()

▸ End-to-end signal path trace: DBC signal → Com_Signal → PduR route → CanIf PDU → CAN frame - verifying each hop with CAN analyzer capture

▸ Integration build issues: resolving unresolved externals (missing SchM stubs), Std_ReturnType redefinitions, and MemMap.h section not mapped errors

▸ Final validation: DEM event logging confirmed via UDS $19 02 response, NvM WriteAll triggered and verified with power-cycle readback

Debugging & Production Readiness

4 chapters • 2.5 hrs reading

Common Integration Errors & Fixes 45 min read

▸ Linker errors decoded: missing SchM_Enter/Exit stubs, MemMap.h unrecognized section, Rte_Type.h duplicate typedef - root cause per error pattern

▸ Silent CAN Rx failure: CanIf PDU handle mismatch (CAN ID vs. handle ID confusion) causing frames to be silently discarded - detection via CanIf_GetRxErrorCounter

▸ OS runtime faults: task overrun (ActivateTask not called in time), stack overflow detected via OsHook_StackFault, priority inversion on shared resource

▸ DEM/FIM blocking: FimPermission permanently inhibiting SWC output due to unconfigured DTC→FID mapping - step-by-step FIM configuration fix

Runtime Debugging with Trace Tools 40 min read

▸ Lauterbach TRACE32 with AUTOSAR OS awareness: loading the ORTI file, viewing task/ISR timeline, reading per-task stack watermarks

▸ SWC variable access in Watch window: dereferencing Rte_IRead_<Runnable>_<Port>_<Element>() return pointers - live signal monitoring without code changes

▸ XCP-based measurement: linking DAQ list to A2L MeasurementCharacteristic, setting sample rate, and capturing via CANape over CAN or ETH

▸ Targeted BSW trace: conditional breakpoints on Com_SendSignal() filtered by signal handle ID - isolating a single PDU without halting the whole stack

Performance Optimization Techniques 35 min read

▸ CPU load profiling with TRACE32 runtime statistics: task net time vs. gross time, ISR jitter - identifying which BSW main function dominates the 1ms task

▸ Flash/RAM footprint reduction: removing unused BSW variants, disabling DET in production (Det_ReportError stubbed), post-build config separation benefits

▸ OS scheduling tuning: merging low-load 1ms tasks to reduce context-switch overhead, tuning alarm tick resolution vs. OS timer granularity trade-off

▸ Stack right-sizing: paint-pattern watermark measurement per task, reducing over-allocated BSW task stacks, and verifying headroom after optimization

Production Configuration Checklist 30 min read

▸ DET disabled for production: Det_ReportError() stubbed/bypassed, DevErrorDetect = FALSE verified per module - never ship a DET-enabled build

▸ DEM production settings: DTCFormatIdentifier = ISO14229-1, EventMemory overflow behaviour (DISPLACEMENT / IGNORE), confirmed storage capacity for production DTC count

▸ NvM CRC integrity: NvMBlockUseCrc = TRUE for all safety-relevant blocks, CRC type (CRC8/CRC16/CRC32) selection vs. block size and init strategy (ROM defaults)

▸ Final configuration audit: no AUTOSAR_DEV_ERROR_DETECT defined, all BSW modules reach INITIALIZED state at EcuM FULL_RUN, watchdog (Wdg/WdgM) alive supervision armed

Tools Used

ISOLAR-AB

EB tresos Studio

DaVinci Configurator Lauterbach TRACE32 Vector DaVinci Developer SystemDesk

What You'll Learn

Configure all major AUTOSAR Classic BSW modules from scratch

Design and implement Software Components with proper port interfaces

Set up complete communication stacks for CAN, LIN, and FlexRay

Implement full diagnostic stacks (DCM/DEM/FIM) with UDS services

Configure non-volatile memory management with NvM/Fee

Debug and resolve common AUTOSAR integration issues

Work confidently with production AUTOSAR toolchains

Prerequisites

Basic C programming knowledge

Understanding of embedded systems concepts

Familiarity with CAN protocol basics

Full Access

Free with Pro

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This course includes:

38 detailed documentation chapters

Downloadable resources

Searchable text documentation

Code snippets & technical diagrams

Hands-on exercises

Lifetime access

Certificate of completion